Review Notes¶
This page collects every .. todo:: note left during the first-pass
conversion from OCR. They mark figures that were redrawn, text that could not
be read, and places where the original manual appears to contain a misprint.
To hide these notes once proofreading is finished, set
todo_include_todos = False in conf.py and remove this page from the
table of contents in index.rst.
Todo
The OCR reads the third format line as CODE REGM, but CODE DATA
matches the instructions in the table below. Check scans/page-71.png.
(The original entry is located in /home/work/Documents/code/Intel8080_Assembly_Manual/source/appendix-a.rst, line 371.)
Todo
The JP row is transcribed as printed (scans/page-73.png). It tests
“(Zero)”, but JP actually tests the Sign bit. This looks like a
misprint in the original. (The printed JZ description, “Jump to ADDR of
Zero set”, has been corrected to “if”.)
(The original entry is located in /home/work/Documents/code/Intel8080_Assembly_Manual/source/appendix-a.rst, line 517.)
Todo
Every call row is transcribed as printed (scans/page-73.png), with
“(SP) ← (SP)+2”. A call pushes onto the stack, so the stack pointer is
actually decremented: (SP) ← (SP)-2. This looks like a misprint in the
original. The same applies to RST below.
(The original entry is located in /home/work/Documents/code/Intel8080_Assembly_Manual/source/appendix-a.rst, line 586.)
Todo
The OCR of the RNZ row (scans/page-74.png) includes a duplicated
“(SP) ← (SP) ← (SP)+2”. It is written here the same as the other rows.
Check whether the duplication is in the original.
(The original entry is located in /home/work/Documents/code/Intel8080_Assembly_Manual/source/appendix-a.rst, line 647.)
Todo
This table is transcribed as printed (scans/page-77.png to
scans/page-79.png). Some misprints in the original:
PUSH PSW is printed as 11110001, which is the pattern for POP PSW. The correct pattern is 11110101 (F5H).
AND r and AND M are printed with the mnemonic “AND”. The actual mnemonic is ANA.
In the RST row, “AAA” is the 3-bit restart number (EXP).
(The original entry is located in /home/work/Documents/code/Intel8080_Assembly_Manual/source/appendix-b.rst, line 157.)
Todo
In the original (scans/page-80.png, scans/page-81.png) this table
is printed in three columns, in the order shown here, which is not
numeric. “DC0” (10H) may be “DCO” in the scan. Consider re-sorting the
table by code for easier reading.
(The original entry is located in /home/work/Documents/code/Intel8080_Assembly_Manual/source/appendix-c.rst, line 213.)
Todo
Because these tables are computed, they don’t reproduce misprints in the
original. For example, the scan (scans/page-84.png) prints 1016
as 23 8652 6FC1 0000, but the correct value is 23 86F2 6FC1 0000.
Spot-check a few rows against the scans.
(The original entry is located in /home/work/Documents/code/Intel8080_Assembly_Manual/source/appendix-d.rst, line 13.)
Todo
The three bit-addition diagrams in this section were rebuilt, and the
arithmetic checked, but the layout of the arrows may not match the
original. Check scans/page-11.png and scans/page-12.png.
(The original entry is located in /home/work/Documents/code/Intel8080_Assembly_Manual/source/chapter-1.rst, line 460.)
Todo
The last DATA example, 3EH=10/2 (2 AND 2), is transcribed as it
appears in the scan (scans/page-18.png), but it doesn’t look like a
valid expression. It may be a misprint in the original.
(The original entry is located in /home/work/Documents/code/Intel8080_Assembly_Manual/source/chapter-2.rst, line 602.)
Todo
“CMI” in the note above is transcribed as printed. It is probably a misprint for CPI (chapter 1 lists SUB, SBB, SUI, SBI, CMP, and CPI).
(The original entry is located in /home/work/Documents/code/Intel8080_Assembly_Manual/source/chapter-2.rst, line 792.)
Todo
The STR example (scans/page-20.png) is printed as 'STRINGSpl' with
assembled data 535452494E472031. That data spells “STRING 1”, so the
string was probably meant to be 'STRING 1' and the “Sp” stands for a
space. Decide whether to keep the literal text or add an editorial note.
(The original entry is located in /home/work/Documents/code/Intel8080_Assembly_Manual/source/chapter-2.rst, line 848.)
Todo
The assembled data for M1 is printed as “26EC” in the scan
(scans/page-32.png), but MVI H,3CH assembles to 263C. This looks like a
misprint in the original.
(The original entry is located in /home/work/Documents/code/Intel8080_Assembly_Manual/source/chapter-2.rst, line 2766.)
Todo
The CZ and CNZ descriptions are transcribed as printed
(scans/page-41.png), but the original has them swapped. CZ actually
calls when the Zero bit is one, and CNZ when it is zero (compare
JZ/JNZ and RZ/RNZ). Consider adding an erratum note for readers.
(The original entry is located in /home/work/Documents/code/Intel8080_Assembly_Manual/source/chapter-2.rst, line 4044.)
Todo
In the scan, the CPE bit diagram labels both address bytes “low add”. This transcription uses “low add / hi add” to match every other instruction.
(The original entry is located in /home/work/Documents/code/Intel8080_Assembly_Manual/source/chapter-2.rst, line 4163.)
Todo
The OCR of scans/page-42.png was badly jumbled, and the “110 for RP”
line was missing. The table above is reconstructed; check it against the
scan.
(The original entry is located in /home/work/Documents/code/Intel8080_Assembly_Manual/source/chapter-2.rst, line 4241.)
Todo
The MAC1 reference is transcribed as printed (scans/page-50.png). There
is a closing quote but no opening one, and the comment is split over two
lines. The intended operand was probably C,D,'; DECREMENT REG C'.
(The original entry is located in /home/work/Documents/code/Intel8080_Assembly_Manual/source/chapter-3.rst, line 346.)
Todo
The IXAD expansion is transcribed as printed (scans/page-53.png). Since
the reference passes LABEL as BSADD, the expansion should read
LXI H,LABEL. This looks like a misprint in the original.
(The original entry is located in /home/work/Documents/code/Intel8080_Assembly_Manual/source/chapter-3.rst, line 736.)
Todo
The stack diagram is transcribed as printed (scans/page-55.png). It
shows the pushed return address as bytes 2C and 00 (2C00H), but the text
says 2C03H is pushed. The low byte should probably be 03.
(The original entry is located in /home/work/Documents/code/Intel8080_Assembly_Manual/source/chapter-4.rst, line 149.)
Todo
The GENAD diagram (scans/page-57.png) shows PARM1 = 8, but the program
below defines PARM1: DB 6. This inconsistency is in the original.
(The original entry is located in /home/work/Documents/code/Intel8080_Assembly_Manual/source/chapter-4.rst, line 254.)
Todo
The DIV listing is transcribed as printed (scans/page-60.png). The
comment on MOV A,C (“Rotate carry into C register; rotate next most
significant bit to carry”) describes a rotate, but no RAL follows it in
the listing. This may be a misprint in the original.
(The original entry is located in /home/work/Documents/code/Intel8080_Assembly_Manual/source/chapter-4.rst, line 535.)
Todo
Pages 1 and 2 of the scan (scans/page-01.png, scans/page-02.png)
are the cover and the inside cover. Only the text above and the
“© Intel Corp., 1975 / Rev. B” line were recoverable by OCR. Consider
adding the cover artwork as an image.
(The original entry is located in /home/work/Documents/code/Intel8080_Assembly_Manual/source/preface.rst, line 10.)