Appendix A: Instruction Summary

This appendix provides a summary of 8080 assembly language instructions. Abbreviations used are as follows:

A

The accumulator (register A)

An

Bit n of the accumulator contents, where n may have any value from 0 to 7 and 0 is the least significant (rightmost) bit

ADDR

Any memory address

Aux. Carry

The auxiliary carry bit

Carry

The carry bit

CODE

An operation code

DATA

8 bits (one byte) of data

DATA16

16 bits (2 bytes) of data

DST

Destination register or memory byte

EXP

A constant or mathematical expression

INTE

The 8080 interrupt enable flip-flop

LABEL:

Any instruction label

M

A memory byte

Parity

The parity bit

PC

Program Counter

PCH

The most significant 8 bits of the program counter

PCL

The least significant 8 bits of the program counter

REGM

Any register or memory byte

RP

A register pair. Legal register pair symbols are:

B for registers B and C
D for registers D and E
H for registers H and L
SP for the 16 bit stack pointer
PSW for condition bits and register A

RP1

The first register of register pair RP

RP2

The second register of register pair RP

Sign

The sign bit

SP

The 16-bit stack pointer register

SRC

Source register or memory byte

Zero

The zero bit

XY

The value obtained by concatenating the values X and Y

[ ]

An optional field enclosed by brackets

( )

Contents of register or memory byte enclosed by parentheses

←

Replace value on lefthand side of arrow with value on righthand side of arrow

Carry Bit Instructions

Format:

[LABEL:]    CODE

CODE

DESCRIPTION

STC

(Carry) ← 1

Set carry

CMC

(Carry) ← (C̅a̅r̅r̅y̅)

Complement carry

Condition bits affected: Carry

Single Register Instructions

Format:

[LABEL:]    INR     REGM
    - or -
[LABEL:]    DCR     REGM
    - or -
[LABEL:]    CMA
    - or -
[LABEL:]    DAA

CODE

DESCRIPTION

INR

(REGM) ← (REGM)+1

Increment register REGM

DCR

(REGM) ← (REGM)-1

Decrement register REGM

CMA

  1. ← (A̅)

Complement accumulator

DAA
If (A0-A3) > 9 or (Aux. Carry)=1,
(A) ← (A)+6
Then if (A4-A7) > 9 or (Carry)=1
(A) = (A) + 6 · 24

Convert accumulator contents to form two decimal digits

Condition bits affected:

INR,DCR  :  Zero, sign, parity
CMA      :  None
DAA      :  Zero, sign, parity, carry, aux. carry

NOP Instruction

Format:

[LABEL:]    NOP

CODE

DESCRIPTION

NOP

—

No operation

Condition bits affected: None

Data Transfer Instructions

Format:

[LABEL:]    MOV     DST,SRC
[LABEL:]    CODE    RP

NOTE: SRC and DST not both = M
NOTE: RP = B or D

CODE

DESCRIPTION

MOV

(DST) ← (SRC)

Load register DST from register SRC

STAX

((RP)) ← (A)

Store accumulator at memory location referenced by the specified register pair

LDAX

  1. ← ((RP))

Load accumulator from memory location referenced by the specified register pair

Condition bits affected: None

Register or Memory to Accumulator Instructions

Format:

[LABEL:]    CODE    REGM

CODE

DESCRIPTION

ADD

  1. ← (A)+(REGM)

Add REGM to accumulator

ADC

  1. ← (A)+(REGM)+(Carry)

Add REGM to accumulator with carry

SUB

  1. ← (A)-(REGM)

Subtract REGM from accumulator

SBB

  1. ← (A)-(REGM)-(Carry)

Subtract REGM from accumulator with borrow

ANA

  1. ← (A) AND (REGM)

AND accumulator with REGM

XRA

  1. ← (A) XOR (REGM)

EXCLUSIVE-OR accumulator with REGM

ORA

  1. ← (A) OR (REGM)

OR accumulator with REGM

CMP

Condition bits set by (A)-(REGM)

Compare REGM with accumulator

Condition bits affected:

ADD, ADC, SUB, SBB:  Carry, Sign, Zero, Parity, Aux. Carry
ANA, XRA, ORA:       Sign, Zero, Parity. Carry is zeroed.
CMP:                 Carry, Sign, Zero, Parity, Aux. Carry.
                     Zero set if (A)=(REGM)
                     Carry set if (A) < (REGM)
                     Carry reset if (A) ≥ (REGM)
                     Note: CMP treats (A) and (REGM) as unsigned
                     8-bit quantities.

Rotate Accumulator Instructions

Format:

[LABEL:]    CODE

CODE

DESCRIPTION

RLC

(Carry) ← A7, An+1 ← An, A0 ← A7

Set Carry = A7, rotate accumulator left

RRC

(Carry) ← A0, An ← An+1, A7 ← A0

Set Carry = A0, rotate accumulator right

RAL

An+1 ← An, (Carry) ← A7, A0 ← (Carry)

Rotate accumulator left through the Carry

RAR

An ← An+1, (Carry) ← A0, A7 ← (Carry)

Rotate accumulator right through Carry

Condition bits affected: Carry

Register Pair Instructions

Format:

[LABEL:]    CODE1   RP
    - or -
[LABEL:]    CODE2

NOTE: For PUSH and POP, RP=B, D, H, or PSW
      For DAD, INX, and DCX, RP=B, D, H, or SP

CODE1

DESCRIPTION

PUSH

((SP)-1) ← (RP1), ((SP)-2) ← (RP2), (SP) ← (SP)-2

Save RP on the stack. RP=PSW saves accumulator and condition bits

POP

(RP1) ← ((SP)+1), (RP2) ← ((SP)), (SP) ← (SP)+2

Restore RP from the stack. RP=PSW restores accumulator and condition bits

DAD

(HL) ← (HL) + (RP)

Add RP to the 16-bit number in H and L

INX

(RP) ← (RP)+1

Increment RP by 1

DCX

(RP) ← (RP)-1

Decrement RP by 1

CODE2

DESCRIPTION

XCHG

  1. ↔ (D), (L) ↔ (E)

Exchange the 16 bit number in H and L with that in D and E

XTHL

  1. ↔ ((SP)), (H) ↔ ((SP)+1)

Exchange the last values saved in the stack with H and L

SPHL

(SP) ← (H):(L)

Load stack pointer from H and L

Condition bits affected:

PUSH, INX, DCX, XCHG, XTHL, SPHL:  None
POP:  If RP=PSW, all condition bits are restored from the stack,
      otherwise none are affected.
DAD:  Carry

Immediate Instructions

Format:

[LABEL:]    LXI     RP,DATA16
[LABEL:]    MVI     REGM,DATA
[LABEL:]    CODE    DATA

NOTE: RP=B, D, H, or SP

Todo

The OCR reads the third format line as CODE REGM, but CODE DATA matches the instructions in the table below. Check scans/page-71.png.

CODE

DESCRIPTION

LXI

(RP) ← DATA16

Move 16 bit immediate DATA into RP

MVI

(REGM) ← DATA

Move immediate DATA into REGM

ADI

  1. ← (A) + DATA

Add immediate data to accumulator

ACI

  1. ← (A) + DATA + (Carry)

Add immediate data to accumulator with Carry

SUI

  1. ← (A) - DATA

Subtract immediate data from accumulator

SBI

  1. ← (A) - DATA - (Carry)

Subtract immediate data from accumulator with borrow

ANI

  1. ← (A) AND DATA

AND accumulator with immediate data

XRI

  1. ← (A) XOR DATA

EXCLUSIVE-OR accumulator with immediate data

ORI

  1. ← (A) OR DATA

OR accumulator with immediate data

CPI

Condition bits set by (A)-DATA

Compare immediate data with accumulator

Condition bits affected:

LXI, MVI:            None
ADI, ACI, SUI, SBI:  Carry, Sign, Zero, Parity, Aux. Carry
ANI, XRI, ORI:       Zero, Sign, Parity. Carry is zeroed.
CPI:                 Carry, Sign, Zero, Parity, Aux. Carry.
                     Zero set if (A) = DATA
                     Carry set if (A) < DATA
                     Carry reset if (A) ≥ DATA
                     Note: CPI treats (A) and DATA as unsigned
                     8-bit quantities.

Direct Addressing Instructions

Format:

[LABEL:]    CODE    ADDR

CODE

DESCRIPTION

STA

(ADDR) ← (A)

Store accumulator at location ADDR

LDA

  1. ← (ADDR)

Load accumulator from location ADDR

SHLD

(ADDR) ← (L), (ADDR+1) ← (H)

Store L and H at ADDR and ADDR+1

LHLD

  1. ← (ADDR), (H) ← (ADDR+1)

Load L and H from ADDR and ADDR+1

Condition bits affected: None

Jump Instructions

Format:

[LABEL:]    PCHL
[LABEL:]    CODE    ADDR

CODE

DESCRIPTION

PCHL

(PC) ← (HL)

Jump to location specified by register H and L

JMP

(PC) ← ADDR

Jump to location ADDR

JC
If (Carry) = 1, (PC) ← ADDR
If (Carry) = 0, (PC) ← (PC)+3

Jump to ADDR if Carry set

JNC
If (Carry) = 0, (PC) ← ADDR
If (Carry) = 1, (PC) ← (PC)+3

Jump to ADDR if Carry reset

JZ
If (Zero) = 1, (PC) ← ADDR
If (Zero) = 0, (PC) ← (PC)+3

Jump to ADDR if Zero set

JNZ
If (Zero) = 0, (PC) ← ADDR
If (Zero) = 1, (PC) ← (PC)+3

Jump to ADDR if Zero reset

JP
If (Zero) = 0, (PC) ← ADDR
If (Zero) = 1, (PC) ← (PC)+3

Jump to ADDR if plus

JM
If (Sign) = 1, (PC) ← ADDR
If (Sign) = 0, (PC) ← (PC)+3

Jump to ADDR if minus

JPE
If (Parity) = 1, (PC) ← ADDR
If (Parity) = 0, (PC) ← (PC)+3

Jump to ADDR if parity even

JPO
If (Parity) = 0, (PC) ← ADDR
If (Parity) = 1, (PC) ← (PC)+3

Jump to ADDR if parity odd

Condition bits affected: None

Todo

The JP row is transcribed as printed (scans/page-73.png). It tests “(Zero)”, but JP actually tests the Sign bit. This looks like a misprint in the original. (The printed JZ description, “Jump to ADDR of Zero set”, has been corrected to “if”.)

Call Instructions

Format:

[LABEL:]    CODE    ADDR

CODE

DESCRIPTION

CALL

((SP)-1) ← (PCH), ((SP)-2) ← (PCL), (SP) ← (SP)+2, (PC) ← ADDR

Call subroutine and push return address onto stack

CC
If (Carry) = 1, ((SP)-1) ← (PCH), ((SP)-2) ← (PCL), (SP) ← (SP)+2, (PC) ← ADDR
If (Carry) = 0, (PC) ← (PC)+3

Call subroutine if Carry set

CNC
If (Carry) = 0, ((SP)-1) ← (PCH), ((SP)-2) ← (PCL), (SP) ← (SP)+2, (PC) ← ADDR
If (Carry) = 1, (PC) ← (PC)+3

Call subroutine if Carry reset

CZ
If (Zero) = 1, ((SP)-1) ← (PCH), ((SP)-2) ← (PCL), (SP) ← (SP)+2, (PC) ← ADDR
If (Zero) = 0, (PC) ← (PC)+3

Call subroutine if Zero set

CNZ
If (Zero) = 0, ((SP)-1) ← (PCH), ((SP)-2) ← (PCL), (SP) ← (SP)+2, (PC) ← ADDR
If (Zero) = 1, (PC) ← (PC)+3

Call subroutine if Zero reset

CP
If (Sign) = 0, ((SP)-1) ← (PCH), ((SP)-2) ← (PCL), (SP) ← (SP)+2, (PC) ← ADDR
If (Sign) = 1, (PC) ← (PC)+3

Call subroutine if Sign plus

CM
If (Sign) = 1, ((SP)-1) ← (PCH), ((SP)-2) ← (PCL), (SP) ← (SP)+2, (PC) ← ADDR
If (Sign) = 0, (PC) ← (PC)+3

Call subroutine if Sign minus

CPE
If (Parity) = 1, ((SP)-1) ← (PCH), ((SP)-2) ← (PCL), (SP) ← (SP)+2, (PC) ← ADDR
If (Parity) = 0, (PC) ← (PC)+3

Call subroutine if Parity even

CPO
If (Parity) = 0, ((SP)-1) ← (PCH), ((SP)-2) ← (PCL), (SP) ← (SP)+2, (PC) ← ADDR
If (Parity) = 1, (PC) ← (PC)+3

Call subroutine if Parity odd

Condition bits affected: None

Todo

Every call row is transcribed as printed (scans/page-73.png), with “(SP) ← (SP)+2”. A call pushes onto the stack, so the stack pointer is actually decremented: (SP) ← (SP)-2. This looks like a misprint in the original. The same applies to RST below.

Return Instructions

Format:

[LABEL:]    CODE

CODE

DESCRIPTION

RET

(PCL) ← ((SP)), (PCH) ← ((SP)+1), (SP) ← (SP)+2

Return from subroutine

RC
If (Carry) = 1, (PCL) ← ((SP)), (PCH) ← ((SP)+1), (SP) ← (SP)+2
If (Carry) = 0, (PC) ← (PC)+1

Return if Carry set

RNC
If (Carry) = 0, (PCL) ← ((SP)), (PCH) ← ((SP)+1), (SP) ← (SP)+2
If (Carry) = 1, (PC) ← (PC)+1

Return if Carry reset

RZ
If (Zero) = 1, (PCL) ← ((SP)), (PCH) ← ((SP)+1), (SP) ← (SP)+2
If (Zero) = 0, (PC) ← (PC)+1

Return if Zero set

RNZ
If (Zero) = 0, (PCL) ← ((SP)), (PCH) ← ((SP)+1), (SP) ← (SP)+2
If (Zero) = 1, (PC) ← (PC)+1

Return if Zero reset

RM
If (Sign) = 1, (PCL) ← ((SP)), (PCH) ← ((SP)+1), (SP) ← (SP)+2
If (Sign) = 0, (PC) ← (PC)+1

Return if minus

RP
If (Sign) = 0, (PCL) ← ((SP)), (PCH) ← ((SP)+1), (SP) ← (SP)+2
If (Sign) = 1, (PC) ← (PC)+1

Return if plus

RPE
If (Parity) = 1, (PCL) ← ((SP)), (PCH) ← ((SP)+1), (SP) ← (SP)+2
If (Parity) = 0, (PC) ← (PC)+1

Return if parity even

RPO
If (Parity) = 0, (PCL) ← ((SP)), (PCH) ← ((SP)+1), (SP) ← (SP)+2
If (Parity) = 1, (PC) ← (PC)+1

Return if parity odd

Condition bits affected: None

Todo

The OCR of the RNZ row (scans/page-74.png) includes a duplicated “(SP) ← (SP) ← (SP)+2”. It is written here the same as the other rows. Check whether the duplication is in the original.

RST Instruction

Format:

[LABEL:]    RST     EXP

NOTE: 000B ≤ EXP ≤ 111B

CODE

DESCRIPTION

RST
((SP)-1) ← (PCH), ((SP)-2) ← (PCL), (SP) ← (SP)+2
(PC) ← 0000000000EXP000B

Call subroutine at address specified by EXP

Condition bits affected: None

Interrupt Flip-Flop Instructions

Format:

[LABEL:]    CODE

CODE

DESCRIPTION

EI

(INTE) ← 1

Enable the interrupt system

DI

(INTE) ← 0

Disable the interrupt system

Condition bits affected: None

Input/Output Instructions

Format:

[LABEL:]    CODE    EXP

CODE

DESCRIPTION

IN

  1. ← input device

Read a byte from device EXP into the accumulator

OUT

output device ← (A)

Send the accumulator contents to device EXP

Condition bits affected: None

HLT Instruction

Format:

[LABEL:]    HLT

CODE

DESCRIPTION

HLT

—

Instruction execution halts until an interrupt occurs

Condition bits affected: None

Pseudo-Instructions

ORG Pseudo-Instruction

Format:

ORG     EXP

CODE

DESCRIPTION

ORG

LOCATION COUNTER ← EXP

Set Assembler location counter to EXP

EQU Pseudo-Instruction

Format:

NAME        EQU     EXP

CODE

DESCRIPTION

EQU

NAME ← EXP

Assign the value EXP to the symbol NAME

SET Pseudo-Instruction

Format:

NAME        SET     EXP

CODE

DESCRIPTION

SET

NAME ← EXP

Assign the value EXP to the symbol NAME, which may have been previously SET.

END Pseudo-Instruction

Format:

END

CODE

DESCRIPTION

END

End the assembly

Conditional Assembly Pseudo-Instructions

Format:

        IF      EXP
- and -
        ENDIF

CODE

DESCRIPTION

IF

If EXP = 0, ignore assembler statements until ENDIF is reached. Otherwise, continue assembling statements

ENDIF

End range of preceding IF

Macro Definition Pseudo-Instructions

Format:

NAME        MACRO   LIST
    - and -
            ENDM

CODE

DESCRIPTION

MACRO

Define a macro named NAME with parameters LIST

ENDM

End Macro definition